The invention relates to the fabrication of semiconductor integrated circuits (ICs). More particularly, the invention relates to apparatus and methods for passivating a semiconductor substrate after metal etching.
In semiconductor IC fabrication, devices such as component transistors are formed on a substrate, which is typically made of silicon. Uses for the substrate may include, for example, the fabrication of ICs or flat panel displays. Successive layers of various materials are deposited on the substrate to form a layer stack. Metallic interconnect lines may then be employed to couple the devices of the IC together to form the desired circuit.
To form the aforementioned metallic interconnect lines, a portion of the layers of the layer stack, including the metallization layer, may be etched after a suitable lithography technique. By way of example, one such lithography technique involves the patterning of a photoresist layer by exposing the photoresist material in a contact or stepper lithography system, and the development of the photoresist material to form a mask to facilitate subsequent etching. Using an appropriate etchant, the areas of the metallization layer unprotected by the mask may be etched away, leaving behind metallization interconnect lines or features.
Etching of the substrate may, in some cases, create volatile byproducts, which may include chloride compounds. These byproducts, including chloride compounds, may be adsorbed into the substrate during the etching process. After the etching has been completed, an ashing step may be employed to remove the photoresist layer as well as some of the chloride compounds adsorbed by the substrate during etching. In the prior art, ashing is typically accomplished in a plasma reactor system using O.sub.2 /N.sub.2 as ashing source gases. The prior art plasma reactor is typically configured specifically for ashing using the aforementioned O.sub.2 /N.sub.2 as ashing source gases.
The prior art ashing system may be better understood with reference to FIG. 1. In FIG. 1, there is shown a highly simplified ashing system 100 which may be suitable for stripping, for example, the photoresist layer from a wafer. A microwave source 130 generates microwaves that typically pass through a waveguide 118 and excite O.sub.2 /N.sub.2 source gas input through port 102, thereby producing O.sub.2 /N.sub.2 plasma and UV light.
The O.sub.2 /N.sub.2 plasma and UV light pass into ashing chamber 108 and are deflected by a deflector plate 104. Deflector plate 104 typically blocks the UV light from line of sight exposure to wafer 112. As is known, the plasma's contact with deflector plate 104 may cause some of the plasma's charged species, electrons, and reactive neutral species to be recombined. Recombination may change the reactive characteristics of the plasma. By way of example, reactive neutral species that are recombined may become less reactive, thereby affecting the efficiency with which the ashing process is conducted.
After being deflected, the O.sub.2 /N.sub.2 plasma continues downward into ashing chamber 108 and contacts baffle plate 110, which may cause further recombination of the reactive neutral species as well as recombination of the charged species and electrons. The remaining O.sub.2 /N.sub.2 plasma diffuses through holes in baffle plate 110 and contacts wafer 112 (shown disposed on chuck 114) to ash the photoresist thereon as well as to remove some of the adsorbed chloride compounds. Any remaining O.sub.2 /N.sub.2 plasma and ashing byproducts exit ashing chamber 108 through exhaust port 116.
Baffle plate 110 and deflector plate 104 in ashing chamber 108 are typically configured to evenly distribute O.sub.2 /N.sub.2 plasma across the wafer 112. Deflector plate 104 may be better understood with reference to FIG. 2. In FIG. 2, there is shown a prior art deflector plate 104 which may be made of quartz or a similarly suitable material that is not readily susceptible to etching by O.sub.2 /N.sub.2 plasma. In one prior art example, solid deflector plate 104 may be substantially disk shaped with a thickness of about 0.13 inch and an outer diameter of about 2 inches. Deflector plate 104 is typically sized to protect the wafer from line of sight exposure to UV light produced during O.sub.2 /N.sub.2 plasma energization.
Baffle plate 110 may be better understood with reference to FIG. 3. In FIG. 3, there is shown an exemplary prior art baffle plate 110, which may be substantially disk shaped with an outer diameter of about 8.4 inches and a thickness of about 0.13 inch. Baffle plate 110 may also be made of quartz or another suitable material which is also not readily susceptible to etching by the O.sub.2 /N.sub.2 plasma. The center portion of baffle plate 110 typically includes a porous region 204 having a uniform distribution of holes. In one exemplary prior art baffle plate, a typical hole 206 in porous region 204 may have an inner diameter of about 0.13 inch and may be spaced apart from other holes in porous region 204 by about 0.5 inch. The porous region may extend all the way to the periphery of baffle plate 110 or may terminate at an annular region 208. As shown in FIG. 3, annular region 208 surrounding porous region 204 may be solid and may be used to support baffle plate 110 in ashing chamber 108.
Although prior art ashing systems, e.g., ashing system 100 of FIG. 1, has proved useful in the past in removing the photoresist material and some of the adsorbed chloride compounds, they have proven to be inadequate for ashing some modem substrates. By way of example, it has been found that prior art ashing systems are inadequate in addressing corrosion problems in substrates that employ Cu as part of their metallization layer. This is because a high Cu concentration in the metallization layer tends to generate galvanic effects, which may exacerbates the interconnect line corrosion problem after etching is completed. If the adsorbed chloride compounds are inadequately removed, as has been found in substrates ashed in prior art ashing systems, the resulting IC may be rendered defective during use.
The inability of prior art ashing systems to adequately remove the absorbed Cl.sub.2 also causes problems in ICs that employ fairly narrow design rules. If the interconnect lines are wide enough, some corrosion may not unduly affect the IC performance. However, modem IC circuits are scaled with increasingly narrower design rules to achieve greater circuit density. As a result, the width of the interconnect lines or the spacings between adjacent interconnect lines, have steadily decreased. By way of example, while a line width of approximately 0.8 microns (.mu.) is considered acceptable in a 4 megabit (Mb) dynamic random access memory (DRAM) IC, 256 Mb DRAM IC's preferably employ interconnect lines as thin as 0.25 microns or even thinner. Because interconnect line widths are becoming narrower, there is less of a safety margin to deal with corrosion problems, since the thinner interconnect lines may be more easily damaged by corrosion. This is doubly true if Cu is also used in the metallization layer, for the reasons discussed earlier.
To remove more of the adsorbed chloride compounds, there is provided in the prior art a separate passivation step that may be performed before the ashing process. The passivation step removes much of the adsorbed chloride compounds to minimize the corrosion damage. To passivate the substrate, a H.sub.2 O plasma is typically employed. The reaction between the reactive neutral species of the H.sub.2 O plasma and the substrate removes more of the chloride compounds adsorbed by the substrate during etching, thereby minimizing corrosion damage. Passivation has been found to be useful when Cu is present in the metallization layer or when metallization lines are thin.
In the prior art, the same chamber employed for ashing is typically also employed for passivation. When prior art ashing chamber 108 is used for H.sub.2 O passivation, however, it has been found that a relatively long passivation process time may be required. This is because prior art ashing chamber 108 is optimized for O.sub.2 /N.sub.2 ashing, and the dual plate configuration of the prior art ashing chamber 108 results in a high degree of reactive neutral species recombination. As discussed earlier, this reduces the density of the reactive neutral species as well as the effectiveness with which the substrate may be passivated. Among other reasons, a high degree of recombination occurs because many of the reactive neutral species are recombined upon contact with the large interior surfaces of the two plates, i.e., of deflector plate 104 and baffle plate 110.
In view of the foregoing, there are desired improved apparatus and methods therefor which passivate and ash the substrate with a higher degree of efficiency. The improved apparatus and methods preferably remove a high percentage of the adsorbed Cl.sub.2 to reduce the metal corrosion problem while minimizing the time required for such passivation and ashing.